Tema:  Intreruperea Timer0
Laborator Nr 5
Schema bloc:
                                
                                
     
                                
                                
                                
                                
                                
                                
                                
                                
                                
                                
                                
                                
                                
                                
                                
                                
                                
                                
                                
                                
                                
                                
                                
                                
                                
                                
Laborator Nr 5
Scopul lucrarii: 
Deprinderea metodelor
de lucru cu Intreruperea Timer. Studiul principiului de lucru. Registri.
Expunerea
problemei: 
Sa se scrie un program ce utilizeaza intreruperea Timer si afiseaza pe un
monitor un mesaj, exemplu „Error 666”
Consideraţii teoretice:
    Modulul de intrerupere Timer este un modul periferic inclus in majoritatea
controlelor AVR si el poate include pina la 3 
module Timer, rolul acestui modul periferic este masurarea timpului. 
   Componenta principala a modulului
timer este un registru numerator TCNT0, acest registru contine  
8 biti.
8 biti.
  
Trecerea valorii maxime in valoare minima se numeste Overflow si astefel cind avem efectul
de overflow in  se seteaza un bit in Tovf0
    Registrul TCCR seteaza timerul
    Registrul TIMSK mascheaza intreruperea
Frecveta
aparitiei intreruperii TIMER poate fi reglata pe 2 principii
a)     
Reglare
bruta prin setarea divizorului de la semnal de clock, pentru srsa de
incrimentare
b)     
 Setarea valorii initiale
Mersul Lucrării: 
     1. Din
start m-am familiarizat cu scopurile propuse, formulând principiul de lucru cu
memoria RAM.
     2. Am
realizat schema–bloc a programului, care mi-a permis urmărirea pe paşi a
execuţiei programului.
     3. Am întocmit modul de conectare a pinilor
iniţializând porturile de ieşire , între 
care facem legătura prin intermediul registrului temp .
    4.  În cadrul programului AVR STUDIO am realizat
un program în baza a principalelor insructiuni: directive de procesare (.include"8515def.inc",def temp= R16, .cseg), iniaţilizarea
stivei şi a porturilor (ldi,out) şi
partea de procesare care se încheie cu un salt către main.
    5. Din
bibliotecile propuse am ales AVR microcontroller Atmega16 si celelalte elemente
    6. Executând
legătura între programa.hex creată şi schema creată, am activat programul şi am
verificat funcţionabilitatea schemei şi testarea volumului de memorie accesibil
la sistem, prin aprinderea display-iului .
Listingul programului:
.include"m16def.inc"
.dseg 
tab: .byte 8
.cseg
.org 0 
  rjmp Reset
.org 0x12
  rjmp
Timer0_Ovf
.org 0x28
Reset:
                                          ; SP <- Ramend
                               ldi
r16, HIGH(RamEnd)
                               out
sph, r16
                               ldi
r16, LOW(RamEnd)
                               out
spl, R16
                                           ; A, C : output,Value = 0x00
                               ldi
r16, 0xFF
                               out
DDRA, r16
                               out
DDRC, r16
                               ldi
r16, 0x00
                               out
PortA, r16
                               out
PortC, r16
                                         ; Timer0_OVF, Prescaler = 8, OffSet = 100
                               ldi
r16, 0x01
                               out
TIMSK, r16
                               ldi
r16, 0x03
                               out
TCCR0, r16
                               ldi
r16, 0x80
                               out
TCNT0, r16 
                               rcall
TabInit
                               clr
r17                   
                               sei
                Main:
                    rjmp Main
reti
;-------------------------------------------------
Timer0_Ovf:
                               clr
r16
                               out
portA, r16
                               ldi
r16, 200
                               out
TCNT0, r16
                               lsl
r17
                               cpi
r17, 0x00
                               brne
L2
                               ldi
r17, 0x01
                L1:
                               ldi
yh, High(tab)
                               ldi
yl, Low(tab)
                               cpi
r17, 0b00000001
                               brne
L2
                               ldd
r16, y+0
                               out
PortA, r16
                               mov
r18, r17
                               com
r18
                               out
PortC, r18  
                L2:
                               ldi
yh, High(tab)
                               ldi
yl, Low(tab)
                               cpi
r17, 0b00000010
                               brne
L3
                               ldd
r16, y+1
                               out
PortA, r16
                               mov
r18, r17
                               com
r18
                               out
PortC, r18  
                L3:
                               ldi
yh, High(tab)
                               ldi
yl, Low(tab)
                               cpi
r17, 0b00000100
                               brne
L4
                               ldd
r16, y+2
                               out
PortA, r16
                               mov
r18, r17
                               com
r18
                               out
PortC, r18  
                L4:
                               ldi
yh, High(tab)
                               ldi
yl, Low(tab)
                               cpi
r17, 0b00001000
                               brne
L5
                               ldd
r16, y+3
                               out
PortA, r16
                               mov
r18, r17
                               com
r18
                               out
PortC, r18  
                L5:
                               ldi
yh, High(tab)
                               ldi
yl, Low(tab)
                               cpi
r17, 0b00010000
                               brne
L6
                               ldd
r16, y+4
                               out
PortA, r16
                               mov
r18, r17
                               com
r18
                               out
PortC, r18  
                L6:
                               ldi
yh, High(tab)
                               ldi
yl, Low(tab)
                               cpi
r17, 0b00100000
                               brne
L7
                               ldd
r16, y+5
                               out
PortA, r16
                               mov
r18, r17
                               com
r18
                               out
PortC, r18  
                L7:
                               ldi
yh, High(tab)
                               ldi
yl, Low(tab)
                               cpi
r17, 0b01000000
                               brne
L8
                               ldd
r16, y+6
                               out
PortA, r16
                               mov
r18, r17
                               com
r18
                               out
PortC, r18  
                L8:
                               ldi
yh, High(tab)
                               ldi
yl, Low(tab)
                               cpi
r17, 0b10000000
                               brne
L9
                               ldd
r16, y+7
                               out
PortA, r16
                               mov
r18, r17
                               com
r18
                               out
PortC, r18  
    L9:
reti
;-------------------------------------------------
TabInit:
                               ldi
yh, High(tab)
                               ldi yl, Low(tab)
                               ldi r16, 0b01111001 ; r16 <- 'E'
                               st
y+, r16
                               ldi
r16, 0b01010000 ; r16 <- 'r'
                               st
y+, r16
                               ldi
r16, 0b01010000 ; r16 <- 'r'
                               st
y+, r16
                               ldi
r16, 0b01011100 ; r16 <- '0'
                               st
y+, r16
                               ldi
r16, 0b01010000 ; r16 <- 'r'
                               st
y+, r16
                               ldi
r16, 0b01111101 ; r16 <- '6'
                               st
y+, r16
                               ldi
r16, 0b01111101 ; r16 <- '6'
                               st
y+, r16
                               ldi
r16, 0b01111101 ; r16 <- '6'
                               st
y, r16
                     ret 
Schema electrică
Concluzia: 
    În cadrul acestui laborator am cunoscut
metodele de lucru cu Intreruperea Timer, principiul de setare si modul de urilizare. Modulul
Timer se activeaza daca este setat registrul TIMSK cu unitate, astfel pentru a
putea controla frecventa de intrare in intrerupere mai ave inca 2 registri:
TCCR0-
care este un prscaler, si TCNT0- incscrim in el valoarea de la care sa inceapa
incrimentarea. 
    Intrerupea Timer este foarte comoda in
utilizare si foarte usor de setat, ceea ce o face foarte practica.

